The present invention relates to a time switch with dual memory structure-type control memory for use in a time division multiplex communication switching system.
A time division switching system switches connections between two channels of two different time division multiplex communication paths.
Known time division time switches utilize a speech memory and a control memory. Input signals on the channels on a number of input lines, for instance N lines, are sampled at a constant interval and written into the speech memory. The signals are then read out in a prescribed sequence (which is different from that of the writing of the input signals into this speech memory) and output into the channels on the N different output lines. This enables connection of the N communication lines connected to the output side with the N communication lines connected on the input side in any desired combination on a channel basis.
The control memory is used to supply read addresses for the speech memory. Read addresses for the N lines, i.e. N such addresses are written into the control memory and read out in a prescribed sequence and supplied to the speech memory.
To change the connection between channels, the corresponding read address written into the control memory is altered.
Sequential reading of control data written into the control memory is called a hard cycle (HW), and writing or reading of control data to rewrite them is called a soft cycle (SW).
In a first conventional method, for instance, the hard and soft cycles are alternately repeated in an HW, SW, HW, SW . . . sequence, as shown in FIG. 1, and a selected number of such repetitions constitutes one frame. This frame length can be designated for instance, as 125 microseconds (usec), which corresponds to the above-mentioned sampling interval of input signals.
When this method is used, when processing such as rewriting of control data is unnecessary, neither reading out of nor writing into the control memory is executed even if there is an SW. These operations are executed only when necessary, and then, only during the SW when operations are required as illustrated by hatching.
In a second conventional method illustrated in FIG. 2, one frame is composed of HW's alone as a rule, and only when an instruction of rewriting or the like is received from outside through an interface, an HW is replaced with a SW. This method has two versions: in one version, control data is written unconditionally into a prescribed address at any desired timing, regardless of the read address of the control memory in the HW, while in the other version, the read address of the control memory and write control data are monitored during coincidence with the write address.
Now, according to the first method, equal numbers of HW's and SW's are present in each frame, so that its multiplicity can be represented as follows, where THW and TSW are the lengths of time the HW and SW respectively take and TF is the length of a frame, as shown in FIG. 1: EQU TF/(THW+TSW) (1)
On the other hand, the multiplicity of the second system can be represented in the following way, as shown in FIG. 2: EQU TF/THW (2)
Comparison of the two formulas (1) and (2), reveals a disadvantage of the first method in that its multiplicity is much less than that of the second method.
On the other hand, the second method, though permitting a higher degree of multiplicity, is subject to the possibility that, where a SW is replaced in a disregard of the read address of the control memory in a HW, an error may occur in the control data read out of the control memory and supplied to the speech memory.
Furthermore, the arrangement to replace a HW with a SW only when the read address of the control memory is found identical with the write address involves another disadvantage that the control data can be rewritten only once in a frame.
When a conventional time switch using either of the above-mentioned methods is employed, new control data written in from outside through an interface is read out by a HW when the turn comes for its address to be read out, and the speech path is reconfigurated on the basis of this control data. However, since the writing of this control data takes place asynchronously with the position in the frame composition of the speech data on the speech path, no control is possible over the timing at which the speech path is reconfigurated as a result of the rewriting of the control data.
It is therefore impossible to reconfigurate the speech path in an active state with connection by two or more time switches without affecting adversely (contracting or cutting off) the contents of speech memory.
An object of the present invention is, therefore, to provide a time switch with a dual memory structure-type control memory wherein control data can be read out of or written into a control memory as desired without reduction of multiplicity.
Another object of the invention is to provide a time switch with a dual memory structure-type control memory having dual memories wherein either memory can be used as a read operation-only mode with no SW inserted, so that the multiplicity can be increased over that achievable in the prior art.
Still another object of the invention is to provide a time switch with a dual memory structure-type control memory wherein control data or the like can be written into a control memory as many times as desired and at any desired timing within a single frame.